The pads exist now, and they are wired to nothing. That is the odd position the series has arrived in. We have read a CRC unit, a baud generator, a transmitter, a receiver and the umbrella over them; a COBS codec and the loader that streams it; two block RAMs; an engine, in eight instalments, from i…
Read more →Hello, I'm Felipe Balbi.
I build firmware and tools for embedded systems. I work mostly in Rust and C, with detours through Python and shell when the job calls for it. This site is where I keep notes that might be useful to someone other than me.
Embedded systems · Rust · the craft of writing software
Recent posts
- Tamal: Everything, Wired
- Tamal: Out to the Pins
The serdes post ended with a promise and an apology. It had just finished arguing that a (value, enable) pair is the whole of tri-state — three wire states carried in two bits — and then it admitted that none of it was real yet. Every Lanes the engine computes is still just numbers, it said; a descr…
Read more → - Tamal: The Record and the Ring
The wire post left a word-stream sealed. encodeResult wrapped a drained ring — a REVISION word, some records, a HALT terminator — behind an opcode and never looked inside. This post looks inside. It is the smallest file of the whole descent, sixty-four lines, and it is the pure twin the bus post kep…
Read more → - Tamal: Frames on the Wire
The engine is open entire. The outside-in descent that began with the shape post’s map of eight boxes ended when the serdes finale opened the last of them, and everything the fabric does — fetch, decode, compute, drive the pins, record what happened — has now been read leaf by leaf. But a running en…
Read more → - Tamal: Value and Enable
The compute post ended on the one leaf still shut, and it named that leaf by what it does rather than what it is: the drive on the lanes when a PUT walked the beats, the turnaround when the bus changed hands, a byte becoming MSB-first bits on IO[0] — all of it, it promised, built out of a single tin…
Read more → - rambo v0.1.2: the boring release is the point
rambo — the CLI that maps which of a Cortex-M’s SRAM a boot ROM clobbers before your firmware’s first instruction runs — is at v0.1.2. If you’re looking for a new feature, there isn’t one: ### Other - (deps) bump dependencies - add dependabot configuration - chain release binaries from release-plz w…
Read more → - Tamal: Add, And, and the Taken Branch
The register file handed the datapath two values, and we followed them to the door of the next box. rs1v and rs2v — read through one register port, bound for the other — do not travel straight from the read to the write. Between the two ports sits a layer that turns them into something: the value th…
Read more → - Tamal: Sixteen Registers and a Hardwired Zero
The instruction set closed on a name it declined to open. decode had turned a word into an Instr, pulled the operands out as five-bit Reg fields, and handed them on — and the very next thing the dispatch post watched execInstr do was read the registers those fields named: readReg (regs s) (operandRs…
Read more → - Tamal: The Instruction Set
For three posts we held the leaves shut. We read the engine’s shape, watched it dispatch an instruction, and ran its wire, and all the while decode, dataResult, branchTaken, and the rest were names with one-line jobs and no insides. Now we start opening them — in the order the engine reaches for eac…
Read more → - Tamal: The Wire and the Record
The last post ended four instructions mid-gesture. PUT, GET, TAR, MARK, and WAIT_ON each spent their one cycle in Exec not finishing but arming — a shifter loaded, a beat count set, a write recorded in pending, a phase changed — and then the cycle ended and they handed off to a longer phase. This po…
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